ESDA6V1BC6 TRANSIL QUAD SUPPR ESD SOT STMicroelectronics datasheet pdf data sheet FREE from Datasheet (data sheet) search. ESDA6VBC6 STMicroelectronics ESD Suppressors / TVS Diodes Quad Bidirect Array datasheet, inventory & pricing. ESDA6V1-BC6 datasheet,Page:1, ® ESDA6V1BC6 QUAD BIDIRECTIONAL TRANSIL™ SUPPRESSOR FOR ESD PROTECTION ASD™ MAIN APPLICATIONS.
|Published (Last):||27 July 2018|
|PDF File Size:||2.92 Mb|
|ePub File Size:||19.87 Mb|
|Price:||Free* [*Free Regsitration Required]|
PJEC3V3M1FN2 – Bidirectional ESD protection of one line
Peak forward voltage drop versus peak forward current typical values. Application Specific Discretes A. It is also important to note that in this approximation the parasitic inductance effect was esca6v1 taken into account.
Remaining voltage during ESD surge a: STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
Figure A8 shows that in such a condition, i. For these kind of disturbances bf6 clamps close to ground voltage as shown in Fig.
电子元器件E型号索引第页ic交易网 – 博升娱乐官网,博升娱乐官方网站,博升娱乐
Relative variation of leakage current versus junction temperature typical values. Digital eda6v1 measurements configuration Figure Esdz6v1 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. ESD protection is achieved by clamping the unwanted overvoltage. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2.
Typical analog crosstalk measurements Analog crosstalk dB 0 1 10 frequency MHz 1, Figure A5 gives the measurement circuit for the analog crosstalk application. A3a and -Vf negative way, Fig.
Global Source Technology, Inc. – Global Component Stocking & Sourcing Distributor
The perturbed line will be more affected if eda6v1 works with low voltage signal or high load impedance few k? This publication supersedes and replaces all information previously supplied.
The measurements performed with falling edges give an impact within the same range. The clamping voltage is given by the following formula: This phenomenon has to be taken into account when the eesda6v1 impose fast digital data or high frequency analog signals in the disturbing line.
Analog crosstalk measurements 50? However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.
Specifications mentioned in this publication are subject to change without notice.
A3 the high efficiency of the ESD protection: Peak power dissipation versus initial junction temperature. In usual frequency range of analog signals up to MHz the effect on disturbed line is less than dB. By taking into account the following hypothesis: No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.
Capacitance versus reverse applied voltage typical values. No data disturbance was noted on the concerned line.